Electrical Design

Electrical Design Data Jobs

3 jobs found

1mo ago

Applied AI Engineer - VLSI Design

NVIDIA Santa Clara, CA

Santa Clara, CA

1mo ago Closed

$136k - $265k/yr Full time Agentic Ai Ai Automation Ai Ml

This position is no longer accepting applications (closed Sep 1, 2026).

Job Description

An opportunity at NVIDIA in Santa Clara, CA (hybrid) centers on an Applied AI Engineer role with a focus on VLSI design. The position combines developing and deploying AI and agentic solutions to support VLSI engineering flows and CAD systems, translating advanced AI capabilities into practical engineering tools and workflows. The role offers a salary range of USD 136,000 to 264,500 per year and requires a Master’s or PhD in Electrical Engineering or Computer Science/Engineering, with at least five years of industry experience.

Responsibilities

Lead design, development, and deployment of AI applications using LLMs, internal and external Agentic frameworks, and related technologies.
Build the infrastructure to deploy LLM-powered engineering assistants and multi-turn, multi-modal dialogue systems to drive impact.
Create agentic AI solutions to tackle complex VLSI engineering problems and integrate them with CAD flow systems.
Utilize AI to improve efficiency in solving challenging chip design problems.
Develop and maintain design databases and dashboards that employ agentic and deterministic retrieval to surface pertinent engineering data and accelerate circuit design closure.
Collaborate with circuit design, layout, technology, and third-party EDA vendor teams across geographies and time zones.

Requirements

Master’s or PhD in Electrical Engineering, Computer Science/Engineering, or equivalent experience.
5+ years of proven industry experience in a related field.
Proficiency in rapid prototyping with Python and solid foundations in data structures, algorithms, and software engineering principles.
Experience fine-tuning large language models, building advanced multi-agent systems, RAG pipelines, and vector databases.
Strong analytical, communication, and interpersonal skills with the ability to thrive in dynamic, product-focused, distributed teams.
Proactive problem-solving approach and willingness to acquire new skills as needed to achieve results.

Technologies

Python
Large Language Models (LLMs)
Agentic frameworks
RAG pipelines
Vector databases
CAD flow systems

Benefits

Equity
Benefits package

Ways to Stand Out

Experience with Large Language Models (LLMs) and their applications in software and AI development
Proficiency in standard software development methodologies, including version control, testing, and CI/CD
Deep interest in learning diverse concepts and combining them in innovative ways
Prior experience with circuit design or hardware design is a plus

View full job page →

1mo ago

Sr. Physical Design Engineer - Static Timing Analysis, Cloud Scale Machine Learning

Annapurna Labs (U.S.) Inc. Cupertino, CA

Cupertino, CA

1mo ago Closed

$183k - $248k/yr Full time Electrical Engineering Senior Automation

This position is no longer accepting applications (closed Aug 27, 2026).

Job Description

Annapurna Labs (U.S.) Inc. offers an onsite Senior Physical Design role in Cupertino, CA with a startup‑like team culture that values collaboration across RTL, architecture, and physical design. The position provides a competitive salary range of USD 183,000 to 247,600 per year and a comprehensive benefits package that includes health insurance, 401(k) matching, paid time off, parental leave, sign‑on payments, and restricted stock units (RSUs).

Responsibilities

Develop and maintain flows for block and full‑chip level static timing analysis.
Write, debug, and validate timing constraints for blocks and the full chip.
Execute Static Timing Analysis and provide regular feedback to team members and leads.
Offer guidance on addressing timing issues, including generating ECOs and correcting constraint issues.
Develop scripts to automate timing analysis and generate reports.
Contribute as a valued member of a startup‑like team through strong collaboration with other physical design engineers and with the RTL and Architecture teams.

Requirements

Experience with scripting languages such as Perl, Python, or JavaScript.
BS with 8+ years, MS with 6+ years, or PhD with 4+ years in EE/CS.
Expertise in timing analysis fundamentals.
3+ years of experience performing Static Timing Analysis.
3+ years developing timing constraints.
Experience with timing analysis using EDA tools such as PrimeTime, Tempus, or equivalent.
Understanding of ASIC physical design from RTL to GDSII.
Understanding of other sign‑off activities, including IR/EM, physical verification, and DFT.

Technologies

Perl
Python
Javascript
PrimeTime
Tempus
PT‑DMSA
Tempus‑ECO
Tweaker
STAR‑RC
Quantus
SPICE
SPECTRE
DDR
HBM
PCIe
Die‑to‑Die

Benefits

Health insurance
401(k) matching
Paid time off
Parental leave
Sign‑on payments
Restricted stock units (RSUs)

View full job page →

1mo ago

Applied Machine Learning Engineer, Circuit Design - New College Grad 2026

NVIDIA Santa Clara, CA

Santa Clara, CA

1mo ago Closed

$116k - $219k/yr Full time Electrical Engineering Ai Assisted Engineering Artificial Intelligence

This position is no longer accepting applications (closed Aug 16, 2026).

Job Description

Applied Machine Learning Engineer, Circuit Design for New College Grad 2026 at NVIDIA in Santa Clara, CA (hybrid) with a salary range of USD 116,000 - 218,500 per year.

Responsibilities

Collaborate in a cross-functional team on programs spanning pre-silicon and post-silicon hardware design data, circuit optimization, SPICE correlation, and AI powered design automation.
Contribute to projects across silicon data analysis, manufacturing process variation analysis, VLSI circuit design and timing, and agent driven design exploration with optimized agent flows.
Translate stakeholder requirements into data science, AI/ML, and agent-based system problems; design architectures and implement end-to-end solutions.
Develop, validate, and release models and AI systems that integrate with existing machine learning, design automation, and visualization tools.
Analyze datasets, formulate and validate hypotheses, extract meaningful features, and build models plus self-improving workflows atop them.
Refine models, algorithms, and autonomous optimization loops until the desired QOR is achieved.

Requirements

Master’s degree or PhD in Electrical or Computer Engineering, Computer Science, or Applied Mathematics, or equivalent practical experience.
Strong background in circuit design, VLSI, ASIC, EDA, silicon analysis, or custom circuit design.
Demonstrated experience at the intersection of applied math, machine learning, and software development, with proficiency in Python and C++.

Technologies

Python
C++
PyTorch
LangChain
LangGraph
SPICE

Benefits

Equity
Benefits

Ways to Stand Out

Experience building AI systems for EDA, design automation, or circuit design workflows.
Research or project work in AI-driven EDA, circuit optimization, design-space exploration, or autonomous design systems.
Background creating agent-based systems, autonomous optimization loops, self-improving AI platforms, or production-scale AI/ML pipelines.
Proficiency with deep learning algorithms and AI agent frameworks; hands-on use of PyTorch, LangChain, or LangGraph is highly beneficial.

View full job page →

Electrical Design Data Jobs

Applied AI Engineer - VLSI Design

Sr. Physical Design Engineer - Static Timing Analysis, Cloud Scale Machine Learning

Applied Machine Learning Engineer, Circuit Design - New College Grad 2026

Get Electrical Design Data Jobs alerts